MediaTek straddles TSMC and Intel in AI chip packaging race
MediaTek backed both TSMC CoWoS and Intel EMIB, signaling that AI chipmakers now compete as much on packaging access as on silicon design.

MediaTek has placed itself on both sides of the advanced-packaging divide, saying it can work with TSMC’s CoWoS and Intel’s EMIB as AI chipmakers fight for the most flexible route to higher performance and lower supply risk. Vince Hu, a MediaTek senior vice president, said in Taipei that the company is one of the few custom-silicon providers able to support both approaches.
That matters because packaging has become one of the tightest choke points in the AI chip race. CoWoS, TSMC’s chip-last-on-interposer process, sits inside its 3DFabric family and is built for high-performance computing and heterogeneous integration. TSMC says the platform can pair leading SoCs with more than four HBM2 or HBM2E cubes and very large interposers, features that have helped make it a favored option for AI chips, including Nvidia’s. Intel, meanwhile, has been pushing EMIB as part of its own advanced-packaging portfolio and says the technology is used in high-volume manufacturing with both Intel and external silicon.

MediaTek’s decision to support both ecosystems gives chip customers a narrower set of constraints. It allows them to choose the packaging path that best fits a given design, compare thermal and performance tradeoffs, and avoid becoming too dependent on a single supplier’s capacity. That optionality is especially valuable as advanced packaging lines have become a bottleneck in AI production, with demand for specialized assembly rising alongside the appetite for custom accelerators and tightly stacked memory.
Intel appears to see strategic value in that opening. EMIB is being considered for custom AI chips MediaTek is designing for Alphabet’s Google, according to two people familiar with the matter, though MediaTek did not publicly identify the customer. Google has already been expanding its custom-silicon ambitions, publicly unveiling eighth-generation TPUs at Cloud Next in April 2026. Intel has also recently emphasized EMIB-T as a way to package larger AI and HPC designs, while the company highlighted Ravi Mahajan on May 28 as a foundational figure behind EMIB.
For TSMC, MediaTek’s stance does not diminish CoWoS’s dominance, but it does underscore a more contested market for advanced packaging than the one-chip-one-foundry model once suggested. The center of gravity in the AI hardware race is shifting. Power now rests not only with the companies that can etch the silicon, but with the ones that can package it, scale it, and keep multiple paths open when capacity gets tight.
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