Nanoscale 3D Printing Achieves Record-Low Coupling Loss in Fiber-to-Chip Interfaces

Getting light into and out of a photonic chip has long been the packaging problem nobody wants to talk about. Optical fibers and on-chip waveguides operate at fundamentally different scales, and threading them together with the micrometer precision required has traditionally meant expensive active alignment rigs, slow throughput, and manufacturing complexity that limits how far photonic integrated circuits can actually scale. Researchers led by Erik Jung at Heidelberg University just published a solution that replaces that entire alignment apparatus with something closer to plugging in a USB cable.

The team, working with collaborators including Wolfram Pernice at the University of Münster's Kirchhoff Institute for Physics, demonstrated a plug-and-play fiber-to-chip connector fabricated directly onto chip surfaces using two-photon polymerization, the same direct laser writing process that the broader 3D printing community knows for its sub-micron resolution. The connector achieved 0.78 dB total coupling loss, a sub-decibel figure the researchers describe as record-low for this class of interface. Results appeared in Science.

The architecture works as a passive mechanical-microoptical interlock. Rather than relying on precision stages and active feedback to position fibers, the 3D-printed structure physically locks a standardized fiber array into alignment on insertion. Inside, total internal reflection couplers redirect light across the telecom band from 1,500 to 1,600 nm, giving the connector broadband utility rather than locking it to a narrow grating coupler window. The coupling material is transparent and infrared-compatible, a specification Nanoscribe highlights as one of the two key fabrication demands the project had to meet alongside mechanical stability.

The other critical enabler was precision. Nanoscribe's Quantum X align system, used in fabrication, delivers nanometer-level alignment accuracy across different feature scales through its direct laser writing process. That level of control is what makes printing an optical-quality structure directly onto a chip surface practical rather than theoretical.

From a manufacturing standpoint, the number that matters most might be the packaging time: under three minutes per port. For a field where active alignment of a single fiber array can consume significant bench time and require specialized equipment, that figure represents a meaningful shift in what production-scale PIC packaging could look like. The team demonstrated the approach on a 16×1 photonic matrix, showing multiport interfacing at scale rather than just a single optimized test structure.

The connector is also removable, meaning the 3D-printed plug supports repeated insertion and removal rather than being a permanent bond, an attribute that changes how chip testing and system assembly could be handled downstream.

Application domains the researchers and coverage point to include optical communications, sensing, quantum technologies, and neuromorphic computing, all fields that depend on photonic integrated circuits pushing data at high throughput with minimal latency. The broadband 1,500-1,600 nm design aligns directly with deployed telecommunications infrastructure, which lowers the barrier for practical adoption. Whether sub-three-minute passive packaging at 0.78 dB holds across production volumes and repeated insertion cycles remains the open question, but the published 16×1 matrix demonstration suggests the architecture is already operating beyond proof-of-concept scale.